張耀文 Yao-Wen Chang
Yao-Wen Chang(張耀文) was born in Chia-Yi, Taiwan in 1966. He received the B.S. degree from National Taiwan University in 1988, and the M.S. and Ph.D. degrees from the University of Texas at Austin in 1993 and 1996, respectively, all in computer science.
Currently, he is a Professor of the Department of Electrical Engineering and the Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan. He is currently also a Visiting Professor at Waseda University, Japan. He was with IBM T.J Watson Research Center, Yorktown Heights, New York in 1994. From 1996 to 2001, he was on the faculty of National Chiao Tung University, Taiwan. His research interests lie in physical design for VLSI circuits, design for manufacturability/reliability, and design automation for biochips. He has published over 130 ACM/IEEE conference/journal papers in these areas, including quite a few highly cited works such as the B*-tree and TCG floorplan representations, NTUplace circuit placement, multilevel routing frameworks, universal switch blocks for FPGA design, and so on. He has also been working closely with the
Dr. Chang is a winner of the 2008 ACM ISPD Global Routing Contest and the 2006 ACM ISPD Placement Contests. He received Prof. Margarida Jacome Memorial Award at the 2007 IEEE/ACM International Conference on Computer Aided Design (ICCAD-07), Best Paper Awards at the 2007 and 2008 VLSI Design/CAD Symposia for his respective works on biochip routing and design for maunfacturablity and at the 1995 IEEE International Conference on Computer Design (ICCD-95) for his work on FPGA routing, the 2007 Outstanding Research Award, the 2005 and 2006 First-Class Principal Investigator Award, and the 2004 Dr. Wu Ta-You Memorial Award from National Science Council of Taiwan, the 2004 MXIC Young Chair Professorship from the MXIC Corp, the inaugural Research Achievement Award from National Taiwan University in 2004, five Excellent Teaching Awards from National Taiwan University in 2004, 2006, 2007, and 2008, and from National Chiao Tung University in 2000, and eleven Best Paper Award nominations from the 2008 ACM/IEEE Design Automation Conference (DAC-08) for his work on OPC-aware routing, the 2007 IEEE/ACM International Conference on Computer Aided Design (ICCAD-07) for his work on design for manufacturability, DAC-08 for his work on flip-chip routing, the 2007 ACM International Symposium on Physical Design (ISPD-07; two papers) for his work on X-architecture placement and Steiner-tree construction, DAC-05 for his work on the X-architecture multilevel routing, the 2004 ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC-04) for his work on temporal floorplanning, 2003 ACM Transactions on Design Automation of Electronic Systems for his work on rectilinear block placement using B*-trees, ICCAD-02 for his work on multilevel routing, the 2001 IEEE International Conference on Computer Design (ICCD-01) for his work on temporal partitioning, and DAC-2K for his work on the B*-tree floorplan representation.
Dr. Chang is an associate editor of the premier journal IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) and is an editor of the International Journal of Information Science and Engineering (JISE) and the International Journal of Electrical and Computer Engineering (JECE). He currently serves on the Executive Committee of ICCAD, Steering Committee of ASPDAC, ACM SIGDA Physical Design Technical Committee, and the Organizing Committees of ISPD and ICFTP, and has served on the technical program committees of most important international conferences on electronic design automation and VLSI circuit design, including DAC, ICCAD, ISPD, ASPDAC (topic chair), ACM/IEEE Design Automation and Test Conference in Europe (DATE), ICCD, ACM Great Lakes Symposium on VLSI (GLSVLSI), IEEE International Symposium on VLSI Design, Automation & Test (VLSI-DAT; topic chair), IEEE International SOC Conference (SOCC; topic chair), IEEE International Conference on Field-Programmable Technology (ICFPT; program co-chair), IEEE International Conference on Industrial Electronics (IECON; topic chair), IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), and IEEE TENCON. He is currently an independent board director of Genesys Logic, Inc., a technical consultant of RealTek Semiconductor Corp., a member of the Board Governors of the Taiwan IC Design Society, and a Principal Reviewer of the SBIR Projects, Ministry of Economics Affairs, Taiwan.