近期活動
| 日期 | 標題 | 簡介 | 內容 | 附檔 | 備註 |
|---|---|---|---|---|---|
| 2010-02-05 | 系辦演講公告 - eDA: Design Automation for Analog Circuits and Green Energy |
地點：電二142 講者: Professor Lei He (UCLA) 講員: eDA: Design Automation for Analog Circuits and Green Energy eDA: design automation for analog circuits and green energy Prof. Lei He, UCLA EE Dept., LHE@ee.ucla.edu I will first present the overview of research related to analog CAD, involving stochastic extraction, parallel SPICE with PVT variations, and analog/RF/MM circuit debugging and optimization. I will then discuss (i) parallel capacitance extraction with presence of processing variation (ii) MIMO (multiple input and multiple output) transmission line synthesis for differential signaling and RF interconnects. I will finally show one example of applying EDA techniques for green transportation and computing, i.e., circuit analysis based battery modeling and management. ======bio Dr. Lei He is a professor at electrical engineering department, UCLA, and was a faculty member at University of Wisconsin, Madison between 1999 and 2001. He also held visiting or consulting positions with Intel, Hewlett-Package, Cadence and Synopsys, and was technical advisory board member for Rio Design Automation and Apache Design Solutions. His research interests include VLSI circuits and systems, and electronic design automation. He has published one book and over 200 technical papers and has been a technical program committee member for a number of conferences including Design Automation Conference, International Conference on Computer-Aided Design, International Symposium on Low Power Electronics and Design, and International Symposium on Field Programmable Gate Array. Dr. He obtained Ph.D. degree in computer science from UCLA in 1999. He was granted National Science Foundation CAREER award in 2000, UCLA Chancellor's faculty career development award in 2003, IBM Faculty Award in 2003, Northrop Grumman Excellence in Teaching award in 2005, best paper award at the 2006 International Symposium on Physical Design, and many best paper nominations at leading conferences. |
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| 2010-01-19 | 系辦演講公告 - Compact model HiSIM-DG valid for independent DG-MOSFETs structure |
地點：博理201 講者: 日本廣島大學三浦道子教授 講員: Compact model HiSIM-DG valid for independent DG-MOSFETs structure Ps. 三浦教授留學德國專精半導體精簡元件模型 2004獲得IEEE fellow 精通德英日語 是日本傑出的女教授 |
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| 2010-01-12 | 系辦演講公告 - Intrinsic Raman spectroscopy for quantitative biological spectroscopy |
地點：電二102 講者: 石為川, Wei-Chuan Shih 講員: Intrinsic Raman spectroscopy for quantitative biological spectroscopy Wei-Chuan Shih, Ph. D. Department of Electrical and Computer Engineering University of Houston Houston, TX 77204-4500 Tel: (713) 743-4406, e-mail: wshih@uh.edu http://www.egr.uh.edu/ece/faculty/shih/ Education and Training Post Doc. Schlumberger-Doll Research 2009 Ph. D. Massachusetts Institute of Technology 2007 M. S. National Chiao Tung University 1999 B. S. National Taiwan University 1997 Research and Professional Experience 8/09-present Assist. Professor, Dep’t. of Electrical and Computer Engineering, Univ. of Houston Research areas: Technology development for biology, biomedicine, energy and the environment. Laboratory affiliation: Optical Sensing and Imaging Lab; Nanosystem Manufacturing Center. Teaching responsibility: Graduate level Digital Signal Processing (Fall 2009) 4/07-7/09 Postdoctoral Fellow, Schlumberger-Doll Research, Schlumberger Research in down-hole fluid analysis using optical spectroscopy, Stand-off offshore oil spill detection and monitoring using optical imaging; Asphaltene science and implication in enhanced oil recovery. Research Interests: Label-free quantitative molecular imaging & sensing for energy, environment, and biomedical applications, N/MEMS, Microfluidics, System integration |
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| 2009-12-09 | 系辦演講公告 - Spectral-Based Group Formation Control |
地點：電二142 講者: Prof. Shigeo Takahashi 講員: Spectral-Based Group Formation Control Given a pair of keyframe formations for a group consisting of multiple individuals, we present a spectral-based approach to smoothly transforming a source group formation into a target formation while respecting the clusters of the involved individuals. The proposed method provides an effective means for controlling the macroscopic spatiotemporal arrangement of individuals for applications such as expressive formations in mass performances and tactical formations in team sports. Our main idea is to formulate this problem as rotation interpolation of the eigenbases for the Laplacian matrices, each of which represents how the individuals are clustered in a given keyframe formation. A stream of time-varying formations is controlled by editing the underlying adjacency relationships among individuals as well as their spatial positions at each keyframe, and interpolating the keyframe formations while producing plausible collective behaviors over a period of time. An interactive system of editing existing group behaviors in a hierarchical fashion has been implemented to provide flexible formation control of large crowds. 演講海報請點此 |
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| 2009-12-02 | 系辦演講公告 - 第三代無線執照釋出機制的設計 |
地點：電二142 講者: 梁高榮教授 講員: 第三代無線執照釋出機制的設計 |
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| 2009-11-26 | 系辦演講公告 - Consensus and Cooperation in Multi-Agent Dynamical Systems: A Unified Approach Based on Systems with Generalized Frequency Variables and Its Applications |
地點：電二142 講者: Prof. Shinji Hara 講員: Consensus and Cooperation in Multi-Agent Dynamical Systems: A Unified Approach Based on Systems with Generalized Frequency Variables and Its Applications Abstract: This talk is concerned with consensus and decentralized cooperative control for multi-agent dynamical systems. We first propose a theoretical framework, namely a class of linear time-invariant systems with generalized frequency variables, for the purpose of consensus and cooperation. We then show several theoretical results on stability and stabilization. Specifically, we propose a systematic way of deriving a Hurwitz type stability criterion, which can be reduced to a linear matrix inequality (LMI) feasibility problem involving generalized Lyapunov inequalities. Regarding the stabilizability, we show that the cooperative stabilization problem by constant output feedback can be reduced to a stabilization problem with complex gain feedback and examine the properties. The last part is devoted to several applications including formation control of multi-robot systems, hierarchical consensus, and analysis of oscillatory behaviors in a class of gene regulatory networks. |
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| 2009-09-03 | 系辦演講公告 - A Framework of Coded Video Multicast |
地點：博理114 講者: Prof. Pin-Han Ho 講員: A Framework of Coded Video Multicast The talk introduces a new framework of coded video multicast in Wireless broadband access for supporting real-time multimedia services such as scheduled IPTV. The talk will firstly give an overview on the proposed coded video multicast framework, which is comprised of an interplay of multiple description coding (MDC) on successively refinable (SR) information source with superposition coding (SPC) based layered modulation at channel. For achieving simple implementation of SPC modulation, the talk will introduce a novel Logical SPC technique which can completely avoid the use of hardware-based signal superposition and signal-interference cancellation (SIC) based demodulation. Based on the proposed framework, the end to end information distortion will be analyzed by assuming Gaussian source and channel, and the developed close-form information distortion upper bound will be further minimized by manipulating the protection code. For dynamic operations, a method will be introduced that can near-optimally determine the system parameters. Extensive experiment results will be provided to show validate the proposed framework and the proposed parameter selection approach. |
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| 2009-08-17 | 系辦演講公告 - Low-power VLSI Design |
地點：博理114 講者: Dr. Pei-Hsin Ho, Fellow of Synopsys, CA 講員: Low-power VLSI Design Abstract: Power is the number one concern for consumer electronics ICs as well as high-performance microprocessors. In this talk I will give an overview to state-of-the-art low-power design strategies. Bio: Pei-Hsin Ho is a Synopsys Fellow with Synopsys. Since 2004, he has been working on physical design and logic synthesis technologies for low-power SoCs. From 1998 to 2003, he was creating Synopsys' formal property verification tool Magellan. From 1995 to 1998, he was with Intel Strategic CAD Labs. Pei-Hsin received his Ph.D. and M.S. degrees in C.S. from Cornell University. He has been issued 5 US patents and published more than 20 technical papers, including receiving a Best Paper Award from DAC. |
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| 2009-07-27 | 系辦演講公告 - Networks with a Local View |
地點：博理112 講者: Prof. Ashu Sabharwal 講員: Networks with a Local View A key element of mobile wireless networks is their distributed nature, which implies that often nodes only have a local view of the network. This leads to a situation where the ground truth for each node is different from other nodes. Yet, they have to make decisions about their transmission parameters like rate and power, such that their collective decision does not violate network capacity limits but still maximize spectral efficiency. In this talk, we will first formulate a message-passing protocol which allows the information about the network to trickle via local message forwarding. The protocol naturally gives rise to networks where nodes have different amount of local information. We will then propose a distributed rate-allocation policy and analyze its performance in some worst case topologies. The analysis systematically captures the extent of loss in network capacity which is incurred when nodes make decisions based on a local view of the network. The analysis directly sheds light on the capacity of classic hidden node topologies, which are often mostly analyzed from the point of view of fair resource allocation. |
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| 2009-06-09 | 系辦演講公告 - (TBA) |
地點：博理201 講者: 孔祥重院士 講員: (TBA) |
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| 2009-06-03 | 系辦演講公告 - Nondeterministic machines: where they come from and how to test them |
地點：博理216 講者: Prof. Nina Yevtushenko, Tomsk State University, Russia 講員: Nondeterministic machines: where they come from and how to test them Non-deterministic networks and non-deterministic Finite State Machines (FSMs) have recently been considered in various areas of discrete event system design and testing. Non-determinism occurs due to various reasons such as performance, flexibility, limited controllability, abstraction, etc. The presentation is divided into two parts. In the former part, we consider Boolean networks which are usually used as a joint compact representation of deterministic behaviors in logic synthesis. In this case, the system specification is non-deterministic while each implementation is deterministic. Testing is needed to determine whether the behavior of a given implementation is contained in that of the specification. In the second part of the presentation, we discuss the problem of testing nondeterministic implementations. Correspondingly we consider a number of conformance relations between FSMs and briefly discuss how to check whether an implementation FSM meets the specification w.r.t. corresponding conformance relation. |
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| 2009-05-26 | 系辦演講公告 - 雷射矯正近視手術 Lasik |
地點：電二101 講者: 蔡翔翎醫師 Dr. Tsai 講員: 雷射矯正近視手術 Lasik |
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| 2009-05-23 | 系辦演講公告 - Testing for Small-Delay Defects in Nanoscale Integrated Circuits |
地點：博理113 講者: Prof. Krish Chakrabarty 講員: Testing for Small-Delay Defects in Nanoscale Integrated Circuits ABSTRACT Small-delay defects (SDDs) are major contributors to test escapes for nanoscale integrated circuits. Such defects are caused by process variations, resistive opens, resistive shorts, etc., and they must be detected by sensitizing long paths in a design. Timing-aware test-generation tools available today suffer from the serious drawbacks of large pattern counts and prohibitively high CPU times. A radically new approach is therefore needed to target long paths without any form of explicit path enumeration. The speaker will present a new technique for SDD detection based on a surrogate coverage metric, referred to as output deviation. A gate-delay defect probability measure will be defined to model delay variations and erroneous behavior for nanometer technologies. This approach requires significantly lower computational complexity and lower pattern counts (thereby less test data volume and test time), and it excites a larger number of long paths compared to commercial timing-aware test-generation tools. The speaker will present results for benchmark and industrial circuits to highlight that, even with lower pattern count, the proposed method provides more effective coverage ramp-up than timing-aware test generation. Biography: Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now Professor of Electrical and Computer Engineering at Duke University. He is also a Chair Professor in Software Theory at the School of Software, Tsinghua University, Beijing, China. Prof. Chakrabarty is a recipient of the National Science Foundation Early Faculty (CAREER) award, the Office of Naval Research Young Investigator award, the Humboldt Research Fellowship from the Alexander von Humboldt Foundation, Germany, and several best papers awards at IEEE conferences. His current research projects include: testing and design-for-testability of integrated circuits; digital microfluidics and biochips, circuits and systems based on DNA self-assembly, and wireless sensor networks. He has authored nine books on these topics (including two in press), published 300 papers in journals and refereed conference proceedings, and given over 120 invited, keynote, and plenary talks. Prof. Chakrabarty is a Fellow of IEEE, a Golden Core Member of the IEEE Computer Society, and a Distinguished Engineer of ACM. He is a 2009 Invitational Fellow of the Japan Society for the Promotion of Science (JSPS). He is recipient of the 2008 Duke University Graduate School Dean’s Award for excellence in mentoring. He served as a Distinguished Visitor of the IEEE Computer Society during 2005-2007, and as a Distinguished Lecturer of the IEEE Circuits and Systems Society during 2006-2007. Currently he serves as an ACM Distinguished Speaker. He is an Associate Editor of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on VLSI Systems, IEEE Transactions on Biomedical Circuits and Systems, and the ACM Journal on Emerging Technologies in Computing Systems. He also serves as an Editor of IEEE Design & Test of Computers and of the Journal of Electronic Testing: Theory and Applications (JETTA). |
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| 2009-05-01 | 系辦演講公告 - Sub-1mW/Gbps High-Speed Links and Design Techniques Enabling Low-Power, Multi-Gigasample/s ADCs |
地點：電一109 講者: Prof. Patirck Chiang 講員: Sub-1mW/Gbps High-Speed Links and Design Techniques Enabling Low-Power, Multi-Gigasample/s ADCs 地點：電機二館105視聽教室 High-speed serial links are limited by two major constraints: 1) power consumption, in regards to energy/bit transmitted; 2) limited bandwidth due to channel losses. In this talk, I will show recent design techniques we have used at the VLSI group at Oregon State in order to tackle these two issues. First, I will discuss the design of low-power, highly parallel serial links, and the analysis of low-power clock generation/distribution to many of these links. I will also show preliminary measurements of distributed injection-locked ring oscillators in 90nm-CMOS for clock distribution, enabling 0.6mW/Gbps, 7-8Gbps serial link receivers for short-range interconnects. Second, I will discuss the design of multi-gigahertz sample rate ADCs (i.e. 10+ GSs, 6b, 100mW), used for many applications such as mm-wave RF systems and band-limited serial links. I will show measurement results of time-interleaved phase calibration for an 8 gigasample/s ADC in 90nm-CMOS, showing residual phase offset after statistical averaging reduced from 22ps to < 1ps. |
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| 2009-04-06 | 系辦演講公告 - Visualisation and Analysis of Large and Complex Networks |
地點：明達231 講者: Prof. Seok-Hee Hong(School of Information Technologies University of Sydney) 講員: Visualisation and Analysis of Large and Complex Networks Graph Drawing is the construction of good visualisations of graphs in two or three dimensions. Recent technological advances have led to many large and complex network models in many domains, including social networks, biological networks, webgraphs and software engineering. Visualisation can be an effective analysis tool for such networks. Good visualisation reveals the hidden structure of the networks and amplifies human understanding, thus leading to new insights, new findings and possible prediction of the future. However, visualisation of such large and complex networks is very challenging due to scalability and complexity. This talk will address these challenging issues for visualisation of large and complex networks and briefly introduce new methods and algorithms for good visualisation of large and complex social networks and biological networks. |
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| 2009-03-30 | 系辦演講公告 - Some weird and wonderful user interfaces |
地點：明達231 講者: Prof. Peter Eades(School of Information Technologies University of Sydney) 講員: Some weird and wonderful user interfaces In this talk we describe some of the user interfaces created by the IMAGEN program at Australia's NICTA laboratory during the years 2003 - 2006. These interfaces include ViBall (a spherical screen), ViCAT (a collaboration interface), haptic shoes (vibrating stock market reports), a head-driven graph editor, a voice-and-finger emergency management interface, and some pieces of information art and music. |
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| 2009-02-23 | 系辦演講公告 - CMOS RF Biosensor Utilizing Nuclear Magnetic Resonance – A Circuit Designer's Approach to Early Disease Detection |
地點：博理101 講者: Prof. Donhee Ham (Harvard University) 講員: CMOS RF Biosensor Utilizing Nuclear Magnetic Resonance – A Circuit Designer's Approach to Early Disease Detection Part 1: I will present our recent work that showcases how silicon RF chips can be used not only for wireless RF applications, but also for biosensing aimed at early disease detection. The main function of our RF chip is to manipulate and monitor RF dynamics of protons in water via nuclear magnetic resonance (NMR). Target biological objects such as cancer marker proteins and viruses alter the proton dynamics, which is the basis for our biosensing. The RF chip has a receiver noise figure of only 0.6 dB. This high sensitivity made possible our construction of an entire NMR system around the RF chip in a 100-g platform (our unpublished, newest system; to be published), which is 1200 times lighter, 1100 times smaller, yet 150 times more mass sensitive than a state-of-the-art commercial benchtop NMR system. With an ability of sensing one target biomolecule in 40 trillion water molecules, our system is a circuit designer’s approach to pursue early disease detection in a low-cost, hand-help platform. |
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| 2009-02-16 | 系辦演講公告 - 學術研究與道德責任: 進入學術領域的第一課 |
地點：博理101 講者: 應力所 李世光教授 講員: 學術研究與道德責任: 進入學術領域的第一課 |
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| 2008-12-19 | 系辦演講公告 - Combating Measurement Errors in Localization---Yes, There Could Still |
地點：博理103 講者: H. T. Kung (孔祥重) 講員: Combating Measurement Errors in Localization---Yes, There Could Still We consider the problem of relative localization of wireless nodes in an outdoor, open-space environment, using solely local ad-hoc radio ranging measurements, e.g., 802.11. As in other range-based methods, we cast ranging measurements as a set of distance constraints, thus forming an over-determined system of equations suitable for non-linear least squares optimization. However, ranging measurements are often subject to errors, induced by multipath signals and variations in path loss, or even faulty hardware or antenna connectors. Including such erroneous measurement data ultimately results in inaccuracies in the localization solution. We present a new method, called snap-inducing shaped residuals (SISR), which automatically identifies \"bad nodes\" and \"bad links\" arising from these errors, so that they receive less weight in the localization process. We demonstrate the performance of SISR in the presence of ranging error, both in simulation and in field experiments on a testbed of 20 wireless nodes. The talk is based on a just written draft paper authored by H. T. Kung, Chit-Kwan Lin, Tsung-Han Lin and Dario Vlah at Harvard University. |
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| 2008-12-18 | 系辦演講公告 - Testing and BIST of Data Converters with Imprecise Signal Sources and Measurement Devices |
地點：電二124 講者: Prof. Randall Geiger 講員: Testing and BIST of Data Converters with Imprecise Signal Sources and Measurement Devices Standard production and bench testing of linearity characteristics of data converters invariably includes the use of signal generators or measurement devices that have linearity that is significantly better than that of the device under test (DUT). This necessitates the use of high-end mixed signal testers when testing high-resolution data converters and practically precludes the incorporation of this test methodology into a built-in-self-test (BIST) solution. In this presentation, methods of linearity testing of data converters with imprecise signal sources or measurement devices will be discussed. With this approach, it will be shown that certain classes of readily generated but unknown nonlinear test signals that are several bits less linear than that of the DUT can be used for full code density testing of ADCs. Experimental results for testing of a 16-bit SAR ADC will be presented along with a discussion of adaptations of this approach to BIST and BIST-based on-chip self calibration. |
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| 2008-12-10 | 系辦演講公告 - Formal Hardware Verification |
地點：博理103 講者: 日本東京大學 藤田 昌宏 教授 (Prof. Masahiro Fujita) 講員: Formal Hardware Verification •Hardware-Accelerated Formal Verification A semi-formal verification technique, which performs a brute-force compiled simulation with a sophisticated search space pruning, has been proposed and shown to be competitive with the state-of-the-art SAT-based verification techniques, especially for complicated logics such as hardware having various arithmetic computation units. We have enhanced this technique by using an FPGA-based hardware accelerator (a kind of FPGA emulation but targeting formal verification), and our preliminary results showed that our verifier is about 7 times faster than the original software-based semi-formal verifier running on the state-of-the-art processors. The approach is a sort of hardware/software co-design and co-execution approach to formal verification. We demonstrate our techniques on PC with extra FPGA board implementation. •Modular-HED: A Canonical Decision Diagram for Modular Equivalence Verification of Polynomial Functions and its Application to Synthesis and Verification of Arithmetic Circuits In this talk, we would like to introduce a canonical polynomial representation called Modular Horner Expansion Diagram (Modular-HED) which is able to represent multi-variate polynomial functions over finite integer rings . This representation not only has a compact and canonical form, but also is close to hardware-software descriptions so that it can be utilized as a common model for formal verification as well as synthesis. This talk discusses how to reduce polynomial functions to normal forms in a canonical decision diagram. In order to evaluate the effectiveness of our approach, we apply the Modular-HED package to equivalence verification problem and compare experimental results with those of contemporary techniques. Also, we will discuss about the use of Modular-HED and also bit-level analysis methods to optimize arithmetic circuits such as multipliers, MAC circuits, and others. The proposed techniques combines word-level and bit-level analysis so that both architectural and circuit level optimizations can be analyzed within the same framework. The proposed verification methods are able to deal with much larger arithmetic circuits than previously proposed ones in the sense that circuits with larger bit-widths and higher orders of polynomials can be processed. |
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| 2008-12-01 | 系辦演講公告 - 莎士比亞唱京劇 |
地點：博理101 講者: 當代傳奇劇場 吳興國創意總監 講員: 莎士比亞唱京劇 |
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| 2008-11-24 | 系辦演講公告 - Service Research at IBM |
地點：電二104 講者: Dr. Jun-Jang (JJ) Jeng 講員: Service Research at IBM To be provided. |
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| 2008-10-23 | 系辦演講公告 - Fast Floorplanning for modern FPGAs |
地點：博理103 講者: Professor Susmita Sur-Kolay 講員: Fast Floorplanning for modern FPGAs Recent FPGA architectures are heterogenous owing to the presence of millions of gates in CLBs, Block RAMs, and Multiplier blocks (MULs) which can host fairly large designs, especially for embedded systems. While their physical design calls for floorplanning in contrast to earlier FPGAs, the traditional algorithms for ASICs do not suffice. First, we propose a three phase algorithm for unified floorplan topology generation and sizing in heterogeneous FPGAs. Experimental results on benchmark circuits show that our floorplan generation method can produce feasible solutions within a few seconds with an improvement in total half perimeter wirelength between 15% to 53%, compared to the very few previous approaches. Next, we adapt this for partial reconfigurability as large designs may not fit into a single FPGA chip, or all the modules may not be active simultaneously, thus causing under-utilization of resources. Given a schedule of sub-task instances with each instance having a netlist of active modules, a global floorplanning method is proposed reduce the reconfiguration overhead by fixing the position and shapes of common modules across all instances, while optimizing the performance. Experiments on a set of benchmarks indicate that our method helps in reducing the reconfiguration overhead with a small sacrifice in wirelength, compared to the methodology of optimizing for each instance individually. |
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| 2008-10-16 | 系辦演講公告 - 我真的是老師 >"< |
地點：電二142 講者: 黃寶儀教授 講員: 我真的是老師 >"< |
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| 2008-10-15 | 系辦演講公告 - 電機前瞻研究領域介紹-10/15 12:20 在142會議室,歡迎參加! |
地點：電二142 講者: 電機所教師 講員: 電機前瞻研究領域介紹-10/15 12:20 在142會議室,歡迎參加! 971015座談會 一、題目：電機前瞻研究領域介紹 二、時間： 97年10月15日(星期三) 中午12:20 三、地點：電機二館１４２會議室 四、內容： 你想了解控制、電力、CS 在學些什麼嗎?? 你想知道未來發展趨勢嗎?? 碩士甄試審查重點?? 歡迎參加 備精緻餐點，數量有限，請提前入場。 五、議程： 1.引言(副主任)：12:20-12:30 2.控制組介紹：12:30-12:50 3.電力組介紹：12:50-13:10 4.ＣＳ組介紹：13:10-13:30 5.Ｑ＆Ａ：13:30-14:00 |
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| 2008-07-21 | 系辦演講公告 - Introduction of Modern Logic Synthesis |
地點：博理114 講者: Dr. Alan Mishchenko (UC Berkeley) 講員: Introduction of Modern Logic Synthesis The lecture describes the problems solved by logic synthesis. It presents functional representations and typical computations applied to Boolean networks, such as traversal, windowing, cut computation, simulation, Boolean reasoning. Presented next are And-Inverter Graphs (AIGs) that are increasingly used as a unifying representation for all problems. The lecture is finished by an overview of AIG-based synthesis: structural hashing, algebraic balancing, rewriting, and don't-care computation. A more detailed plan of this lecture: 1. Problem of logic synthesis 1.1. boolean function and its representations (truth table, SOP, BDD, AIG, etc) 1.2. creation, transformation, minimization of the representations 1.3. multi-level logic synthesis and technology mapping 2. Good representation is key for solving challenging problems 2.1. truth tables for small functions (up to 16 inputs) 2.2. AIGs for larger functions 2.3. why not SOPs? 2.4. why not BDDs? 3. Computing information about Boolean networks 3.1. divide-and-conquer (traversal, windowing, cut computation) 3.2. guess-and-check (bit-wise simulation) 3.3. reason-and-prove (Boolean satisfiability) 4. And-Inverter Graphs (AIG): a unifying representation for all problems 4.1. definition and examples 4.2. several simple tricks that make AIGs work 4.3. why it is a unifying representation 4.4. combinational and sequential AIGs 4.5. AIGs for technology mapping and verification 5. Overview of AIG-based synthesis 5.1. structural hashing 5.2. algebraic balancing 5.3. rewriting/refactoring/redecomposition 5.4. resubstitution 5.5. minimization with don't-cares [Related News] http://scdsource.com/academic.php?id=10 [Speaker] http://www.eecs.berkeley.edu/~alanmi [ABC Project] http://www.eecs.berkeley.edu/~alanmi/abc/ |
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| 2008-07-07 | 系辦演講公告 - The Trend of and Challenges for 3G Handset Front-End Module Development |
地點：電二146 講者: Nick Cheng 講員: The Trend of and Challenges for 3G Handset Front-End Module Development With enriched features and services such as music downloads, movie streaming, video teleconferencing, mobile video games and broadcast television provided to 3G end users, the complexity of handset designs have been escalating tremendously while the size and cost of cellular phones have continued to decline significantly. As a result, there is a clear motivation and path of evolution that highly integrated front end modules (FEM) are needed, as opposed to the discrete solutions, in particular for the 3G multi-band, multi-mode handset architectures. Consequently, new design challenges arise and they greatly impact the development of 3G WCDMA FEM in many ways. Multiple frequency bands have to be supported due to the lack of a single global frequency band for UMTS. In addition, spectrally efficient signal waveforms, which often have higher peak-to-average ratio (PAR) to support an enhanced data rate, dictate the power amplifier (PA) to operate at a back-off power level in order to meet the linearity requirement at the expense of reduced power-added efficiency (PAE). Moreover, a PA’s performance may vary under mismatch or high VSWR conditions when the impedance at antenna port changes, leading to degradation and variation in RF performance at the system level, i.e. reduced total radiated power (TRP), increased current consumption and degraded linearity, even though the level of severity depends on the phase angle and VSWR presented by the antenna load. One thing to keep in mind is that these relatively new challenges are extra additions to the other existing requirements for handset FEM products – small form factor, low bill of material costs, increased functionalities, robust product quality and high production yield. Therefore, FEM designers have to come up with innovative solutions to reduce current consumption, or improve PAE, at various power levels in order to reduce overall talk time while meeting more stringent linearity requirements and minimizing variation and degradation of RF performance under mismatch conditions in particular for the more demanding HSDPA/HSUPA applications. |
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| 2008-07-03 | 系辦演講公告 - Challenges and potentials in 3D IC Design |
地點：博理114 講者: Prof. Yuan Xie, Pennsylvania State University 講員: Challenges and potentials in 3D IC Design As technology scales, interconnects have become a major performance bottleneck and a major source of power consumption for nanoscale VLSI chips. Increasing interconnect costs make it necessary to consider alternate ways of building VLSI chips. One promising option is 3D architectures where a stack of multiple device layers, with direct vertical tunnelling through them, are put together on the same chip. As fabrication of 3D integrated circuits have become viable, developing CAD tools and circuit/architectural techniques are imperative to explore the design space for 3D IC design. In this talk, I will give a brief introduction on 3D integration technology, discuss the challenges of EDA design tools that can enable the adoption of 3D ICs, and present the microarchitecture potentials of using 3D technology. |
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| 2008-05-16 | 系辦演講公告 - (TBA) |
地點：明達223 講者: Dr. Hans Sigg 講員: (TBA) |
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| 2008-04-08 | 系辦演講公告 - 學術漫談系列演講 |
地點：電二142 講者: 呂良鴻教授 講員: 學術漫談系列演講 |
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| 2008-03-24 | 系辦演講公告 - (TBA) |
地點：電二105 講者: Prof. Jean-Claude Latombe 講員: (TBA) |
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| 2008-03-21 | 系辦演講公告 - The only 40 Gb/s coherent optical transmission |
地點：電二124 講者: Dr. Kuang-Tsan Wu (Nortel) 講員: The only 40 Gb/s coherent optical transmission We present measurement results with the first commercial coherent 40Gb/s optical transport system. This coherent 40 Gb/s design enables the use of low cost 10 GHz electro-optic components. With coherent detection, linear digital filters in the receiver are effective to combat chromatic dispersion, polarization dependent loss, polarization mode dispersion, and hardware imperfections. Coherent 40 Gb/s signals can be overlaid on optical lines designed for 10 Gb/s and thereby provide customers with four times the capacity, still without the need for any optical dispersion compensation. Nortel introduced in 2005 the 1s-generation eDCO (electronic Dynamically Compensating Optics) product in which all of the dispersion compensation is implemented with an ASIC in the transmitter. The coherent 40G system represents the Nortel’s 2nd-generation eDCO product. The key element of the coherent system is the 20 million gate 90 nm CMOS ASIC used in the receiver which includes 4 ADCs and a DSP engine. The hardware engine implements all the control loops, including dispersion, polarization compensations, AGC, clock and carrier recovery, requiring 12 trillion integer operations per second. With this ASIC successfully verified and integrated, we can now show real-time measurements of the 40Gb/s optical modem. We will show that the strong performance of this system in the presence of dispersion and severe line degradations will allow, for the first time, ubiquitous deployment of 40 Gb/s over existing fibers. |
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| 2008-03-17 | 系辦演講公告 - (TBA) |
地點：博理101 講者: 金麗科技陳有諒董事長 講員: (TBA) |
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| 2008-03-14 | 系辦演講公告 - (TBA) |
地點：博理101 講者: 院慶生會系列 講員: (TBA) |
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| 2008-03-03 | 系辦演講公告 - (TBA) |
地點：博理101 講者: 陸曉峯教授 講員: (TBA) |
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| 2008-01-31 | 系辦演講公告 - The Unknown Component Problem: Theory and Applications |
地點：博理114 講者: Prof. Nina Yevtushenko 講員: The Unknown Component Problem: Theory and Applications Abstract: The unknown component problem is the problem to design a component that combined with a known part of a system, called the context, conforms to a given overall specification. A key observation is that languages are a suitable common framework for such applications, i.e., the problem is reduced to solving an abstract equation over languages. In this presentation, we address the problem of solving synchronous and parallel language equations. We first discuss applications of the unknown component problem and then study the most general solutions to language equations defining the language operators needed to express them and investigate some restricted solutions to such equations. We also show how an equation can be effectively solved over regular languages, i.e., how to solve automata/FSM equations which are used for design and analysis of digital circuits and discrete event systems. Bio: Nina Yevtushenko is a professor at the department of Electrical Engineering of Tomsk State University, Russia. She has got a professorship title from the Supreme Attestation Committee in Moscow. From 1991 she joined Tomsk State University as a professor and presently she leads a research team working on the synthesis and analysis of discrete event systems. She also stayed as a visiting researcher/professor in Moscow State University, Universite de Montreal, University of Ottawa, Centre de recherche informatique de Montréal, Institute National des Telecommunications in Evry, France, etc. She published around 100 research papers, 3 books and served as a program committee member for a number of international workshops and conferences. Her research interests include formal methods for discrete event system design and analysis, automata theory, hardware and software testing. |
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| 2008-01-16 ~ 2008-01-17 | Convergence of Global Innovators 研討會 |
Day 1 Event 台灣大學工學院國際會議演講廳,工學院綜合大樓203 Day 2 Event 國立清華大學 "化工館 B18演講廳" 國立清華大學 "化工館209教室" 詳情請見網址 http://www.globalsolutions2008.com |
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| 2007-12-25 | 國立台灣大學系統晶片中心 SOC 人才培訓專業講座 |
課程名稱： Three-Dimensional VLSI Technology and Circuit Design 課程日期： 12/25星期二 下午1:30-4:30 (3小時) 課程地點：國立台灣大學 博理館 114室 (台北市羅斯福路四段一號) 主 講 人： 盧奕璋教授 現職：國立台灣大學電子工程學研究所助理教授 學歷：美國史丹福大學電機博士 專長：積體電路設計、製造可行性設計 課程說明： This talk is to introduce concepts of 3D VLSI which can provide better circuit performance in terms of speed, power, and device density for design at advanced technology nodes. In this talk, we will first introduce all necessary backgrounds regarding 3D technology, including 3D packaging and 3D devices. Secondly, we will cover different issues in 3D circuit and physical design. Finally, several 3D design examples will be reviewed and discussed. The goal is to provide all necessary start-up knowledge for 3D VLSI to attendees during this three-hour course. 報 名 方 式：請由台大系統晶片中心網站 |
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| 2007-12-14 | Advanced VLSI Design Workshop |
地點：電機二館105室 Advanced VLSI Design Workshop 日期：2007年12月14日（星期五） 8:30~16:30 地點：國立台灣大學電機二館105室(台北市羅斯福路四段一號) 主 講 人： (A)Prof. Yu Hen Hu 現職：國立台灣大學電子工程研究所客座教授 學歷：University of Wisconsin - Madison, Department of Electrical and Computer Engineering 課程大綱：Many multimedia embedded systems are implemented on a system-on-chip (SoC) platform. To seek balance between performance (throughput, quality) versus cost (energy, chip real estate), it is essential to explore available design options. In this portion of the short course, I will high-light the notion of algorithmic design space exploration. The thesis is on exploiting equivalent algorithm formulations in order to develop globally optimal design. In particular, I will survey three classes of equivalence that arise in modern multimedia algorithms: algebraic equivalence, numerical equivalence, and functional equivalence. I will present algorithm design, transformation, and analysis methods that facilitate efficient exploration of these classes of algorithmic space equivalence relations. I will also use existing multimedia algorithms as design examples to illustrate the approach that leads to optimal SoC design through algorithmic design space exploration. (B)Prof. Naresh Shanbhag 現職：國立台灣大學電子工程研究所客座教授 經歷：Coordinated Science Laboratory, University of Illinois at Urbana-Champaign 課程大綱：Next generation communication SOCs need to address the key challenge of implementing systems with ever increased complexity, hence power, in fragile nano-scale process technologies. Power and reliability are two resulting problems that need to be addressed jointly in order to provide a cost-effective solution in emerging markets. This two-part lecture will present a communications-inspired paradigm for communication SOC design that elegantly addresses the power-reliability problem. The proposed paradigm was developed at the University of Illinois at Urbana-Champaign in 1996 and has today become a mainstream research topic. It views SOCs as miniature communication networks, and employs information and communication-theoretic principles to design low-power and reliable SOCs. The communication-inspired design paradigm requires the SOC designer of the future to understand the very basis of information transfer across noisy channels, and unify system/algorithmic, architectural & circuit level considerations in order to maximize energy-efficiency without compromising reliability. After introducing the communications-inspired view of SOC design, the lecture will illustrate the application of the proposed paradigm in the design of critical communication SOC subsystems such as motion estimation engines, equalizers, on-chip busses, high-speed serial back-plane links and culminate with a case study of a 10 Gb/s maximum likelihood sequence estimation (MLSE)-based receiver. 報名請上中心網頁： Tel: (02)3366-3531, Email: paulinet@cc.ee.ntu.edu.tw |
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| 2007-11-15 ~ 2007-12-14 | 廣達公司捐贈國立臺灣大學博理藝廊開幕展 |
地點：博理館B1博理藝廊 懷著一顆感恩的心，黃友佳系友於畢業離校三十六年後返回母校，願意將其工程生涯退休後，從事書法國畫創作多年的藝術作品，呈獻給母校師友們。這次展出的作品中，包涵了篆隸真行草各體書法、山水花鳥魚獸人物、嶺南暨新意水墨彩墨國畫等近一百二十幅。因受限於博理藝廊的面積空間，無法悉數一次同時展出，將陸續分批分期佈展。 開幕茶會：96年11月15日13:30-14:00 展出期間：96年11月15日至96年12月14日 週一至週五9:00-17:00 展出地點：國立台灣大學博理館B1博理藝廊 |
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| 2007-10-15 ~ 2007-10-26 | 2008校園徵才 |
地點：電機二館 105 視聽教室 各位同學, 2008校園徵才即將登場, 台大SOC中心來為大家暖暖身, 安排 相見禮--即日起可上網填寫履歷,即有500元禮券! 集點抽獎活動--集滿六點可參加抽獎, 獎品有 Canon 最新款雙防手震相機, NDSL, SONY MP3等30個獎項, 等你來拿!! 還有還有廠商的私房菜公告哦! 如華碩上線填履歷, 聯發科加場說明會!! 詳情請參閱中心網站.!! 廠商說明會時間:請見海報! 中心綱站: http://soc.ee.ntu.edu.tw/soc/wiki/index.php |
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| 2007-10-12 | 台大系統晶片中心第三次研發季報 |
時間：13:30~17:10 地點：台灣大學博理館201會議室 由於積體電路製程技術和SOC設計複雜度的日益提升，使得藉由電腦輔助的方式從事積體電路設計成為必然，因此電子設計自動化(Electronic DesignAutomation, EDA)工具對於SOC設計的實現，扮演著關鍵性的角色。有鑑於此，台大系統晶片中心第三次季報將從崁入式系統與結構、電子系統層級、邏輯合成與驗證、實體與製程可行性設計及測試與診斷出發，呈現研發團隊在這領域的前瞻研究，現場也將安排EDA工具展示，歡迎 貴公司相關人員參加。 邀請委員： 台積電－許炳堅處長 奇景－蔡志忠副總 金麗－易建男總經理 思源－呂茂田董事長 凌陽－陳陽成總經理 益華－王惠貞處長 創惟－黃佑充總經理 創意電子－陳建良處長 智原－謝漢卿處長 新思－郭嘉能經理 瑞昱－黃世安副處長 廣達－黃靜敏協理 聯發科－張垂弘副總 聯詠－陳宗宏副總 聯電－張崇德副董 內容簡介請參閱附件 議程表詳見附件. 展示題目： 郭大維 Energy-Efficient Real-Time Scheduling of Multimedia Jobs 簡介: This demo shows the designs and implementations of algorithms for the scheduling of H.264 decoding jobs over Linux and TI DaVinci DVEVM. Job scheduling must be done in a real-time fashion and with the minimization of the energy consumption. 黃鐘揚老師 Formal-Assisted Logic Optimization and Verification (Demo) 李建模老師 Diagnosis of Multiple Scan Chain Timing Faults 聯絡人：唐珮寧小姐 paulinet@cc.ee.ntu.edu.tw 電 話：02-33663531 最新消息請參閱中心網站：http://soc.ee.ntu.edu.tw |
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| 2007-09-27 | 台大系統晶片中心演講公告 |
地點：電機2館105會議室 演講主題: Signal Processing for Wireless Communications: Design, Tools, Architectures 時間： 2007. 9. 27 (Thursday) 14:20 - 17:00 地點： 電機2館105會議室 主講人: Prof. Heinrich Meyr, IEEE Fellow Professor of RWTH Aachen, Germany Director of Institute for Integrated Signal Processing Systems, Aachen University of Technology Prof. Gerd Ascheid, IEEE Fellow Professor of RWTH Aachen, Germany Director of Institute for Integrated Signal Processing Systems, Aachen University of Technology 主辦單位：台大系統晶片中心 協辦單位: 台大電機系、台大資訊工程學系、台大電子工程研究所 聯絡方式：02-3366-9685 康小姐、02-3366-3700 * 370 邱小姐 |
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| 2007-09-14 | 台大系統晶片中心敬邀參加人才培訓課程「積體電路之正規驗證」 |
時間：9:00~16:30 地點：博理館 114室 課程名稱：積體電路之正規驗證 (VLSI Formal Verification) 課程日期：九十六年九月十四日 (星期五) 9:00am – 4:30pm 課程地點： 國立台灣大學 博理館 114室 (台北市羅斯福路四段一號) 主 講 人：黃鐘揚 教授 現職：國立台灣大學電子所教授 學歷：美國加州大學聖塔芭芭拉分校電機資訊博士 經歷：Sr. RD Manager, Verplex/Cadence Design Systems 專長：SoC電路設計驗證．電路設計自動化及最佳化．可驗證性電路設計．Constraint Satisfication問題 曾獲：台大95年度教學傑出獎 報名方式 http://soc.ee.ntu.edu.tw 課程說明： This course is targeted at the researchers and engineers who are working in the VLSI design verification area. We will first go through different options of design verification, and then go deep into the core techniques behind these methodologies. State-of-the-art formal verification algorithms will be covered, and at the end we will review the verification tools and market in order to discuss the future trends for the verification research and development. 課程大綱： 1. What is design verification? 2. What is formal verification? 3. BDD-based formal verification 4. SAT-based formal verification 5. Abstraction and refinement 6. Formal verification techniques in EDA tools |
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| 2007-09-14 | 新生入學指導與新生家長親師座談活動 |
本系於9月14日(五)舉行新生入學指導，9月15日(六)舉行新生家長親師座談活動。 9月14日(五) 08:30~10:20 台大新生入學指導 (綜合體育館) 11:00-12:00 分院介紹與系主任時間 (博理館101) 12:00-13:30 午餐 (電機二館與博理館) 13:30-16:00 系學會時間 (博理館101) 9月15日(六) (家長參加) 08:30-10:00 台大新生家長日 (綜合體育館) 10:30-12:00 電機系親師座談會 (博理館101) 12:00-13:30 午餐 (博理館201) 大一新生與家長活動回函請見附檔 本案聯絡人: 台大電機系二館110室 電話33663700轉172(向新楷小姐) hsinkaih@cc.ee.ntu.edu.tw |
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| 2007-09-02 | 台大電機資訊學院 院徽設計比賽 |
台大電機資訊學院 院徽設計比賽 目的:徵求院徽作為本院之精神標誌 徵求對象:本院教職員生 投稿日期：即日起至96年11月2日16:00截稿 甄選方式：96年11月12日至11月30日公開作品，由全院師生投票 獎勵方式: 第一名 獎金新台幣 12,000元 第二名 獎金新台幣 8,000元 第三名 獎金新台幣 5,000元 聯絡方式:33663501 余小姐;b93901132@ntu.edu.tw 院學生會長林沛吟 詳情: http://www.ee.ntu.edu.tw/college/Ad/EECS_Ad2.html |
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| 2007-08-22 | Prof. Alexander Meduna 演講公告 |
時間：14:00~16:00 地點：博理館 112 室 主講者: Prof. Alexander Meduna Brno University of Technology Czech Republic, Europe 講題: Deep and Regulated Pushdown Automata |
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| 2007-08-20 | 2007年亞太立體視訊技術研討會公告 |
時間：9:00~17:00 地點：博理館 201 室 *時間: 2007年8月20日(一) AM9:30-PM5:00 (9:00-9:30 為報到時間) *地點: 台灣大學 博理館 R201 *演講者: Prof. Tanimoto Masayuki (名古屋大學), Prof. Yo-Sung (光州理工學院), Dr. Min-Chul Park (KIST), Dr. Yu-Lin Chang (台灣大學) *演講主題: Prof. Tanimoto Masayuki -- FTV (Free viewpoint TV) Prof. Yo-Sung Ho -- 3D Video Processing for Realistic Broadcasting System Dr. Min-Chul Park -- 3D Video Technologies, Standard, and Applications in Korea Dr. Yu-Lin Chang -- 3D Video Capturing and Generation *報名聯絡人: 唐小姐 paulinet@cc.ee.ntu.edu.tw 02-3366-3531 吳小姐 fancywu@cc.ee.ntu.edu.tw 02-3366-3531 詳細內容請見附件海報檔案，謝謝！ |
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| 2007-07012 | Intel's Project Management Course - Managing Project to Success |
時間：9:00 ~ 17:00 地點：電機二館 102 Intel’s Project Management Course "Managing Project to Success" Speaker: Kenneth Lau Regional Marketing Manager, Server and Storage Platform Marketing and Enabling, Intel Asia Pacific Time: 9:00am - 17:00pm / July 12 (Thu.) to July 13 (Fri.) , 2007 Expected Audience: 20 NTU EE professors and students (Free and need registration / registration deadline: July 4th, 2007) Place: NTU EE Building 2, Room 102 Agenda: (English Lecture) Day 1-- Prelaunch: Project Charter, description, Stakeholder Analysis Day 2-- Launch: Task Plan, Organization Plan, Resource estimates Day 2-- Execute: Schedules, Progress Reviews Day 2-- Implement: Project implementation and Assessment Day 2-- Closing and Report out 報名連絡人： 康小姐 helenekang@cc.ee.ntu.edu.tw, 02-3366-3700*314 唐小姐 paulinet@cc.ee.ntu.edu.tw, 02-3366-3531 |
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| 2007-07-25 | 台大系統晶片中心演講公告 |
地點：電機二館142會議室 演講題目: 消費性電子產品未來趨勢 時間: 7月25日（星期三）12:20-13:20 演講人: 拓墣科技董事長/拓墣產研研究所 陳清文所長 有鑑於國家政策正積極推動產學合作機制及產學合作績效評估，且一般咸認，透過產學運作，可厚植研發能量，締造雙贏互惠的成果，從而，台大SOC中心特別邀請產學分析專家-拓墣產業研究所陳清文所長-來校進行深入的產業專題報告及互動交流。本次專題將深入探討消費性電子的蓬勃發展。本中心誠摯地邀請各位教授於百忙中撥冗蒞臨演講。 報名聯絡人： 康小姐 helenekang@cc.ee.ntu.edu.tw 02-3366-9685 唐小姐 paulinet@cc.ee.ntu.edu.tw 02-3366-3531 詳情請見附加檔案 |
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| 2007-06-06 | 大學部課程改進座談會 |
時間：6/6 中午 12:10 地點：電機二館 R142 會議室 對大學的修課有疑慮嗎？ 對系上課程的安排有更好的意見嗎？ 或是想要了解更多嗎？ 都歡迎你來參加系上的課程改進座談會。 請於 6/4 前上網報名，報名者當天可獲一份精緻餐盒，座談會細節請見附加檔案之海報。 |
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| 2007-04-30 | Takao Nishizeki 演講公告 |
時間：13:20 ~ 14:10 地點：博理館 101 室 演講廳 主講者：Takao Nishizeki, Graduate School of Information Sciences, Tohoku University, Japan 講題：Partitioning Graphs of Supply and Demand —Generalized Knapsack Problem— 演講摘要：Suppose that each vertex of a graph G is either a supply vertex or a demand vertex and is assigned a positive real number, called the supply or the demand. Each demand vertex can receive “power” from at most one supply vertex through edges in G. One thus wishes to partition G into connected components so that each component C either has no supply vertex or has exactly one supply vertex whose supply is at least the sum of demands in C, and wishes to maximize the fulfillment, that is, the sum of demands in all components with supply vertices. This maximization problem is known to be NP-hard even for trees having exactly one supply vertex and strongly NP-hard for general graphs. In this talk, we focus on the approximability of the problem. We first show that the problem is MAXSNP-hard and hence there is no polynomial-time approximation scheme (PTAS) for general graphs unless P = NP. We then present a fully polynomial-time approximation scheme (FPTAS) for trees. The FPTAS can be extended for series-parallel graphs having exactly one supply vertex. |
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| 2007-04-09 | Dr. Snyder 演講公告 |
時間：13:30 ~ 15:00 地點：博理館 101 演講廳 主講人：Dr. Richard V. Snyder, President, RS Microwave and the New Jersey Institute of Technology 講題：Practical Aspects of Microwave Filter Development |
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| 2007-03-16 | 公共藝術專題講座 |
時間：14:00 ~ 16:00 地點：博理館112教室 講師：藝術家—許禮憲先生 演講方向：台灣公共藝術之我見、個人(公共)藝術創作經驗分享 詳情請見附加之DM內容。 |
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| 2007-02-15 | 電機學群誠徵教師 |
台灣大學 電機工程學群 誠徵教師 Faculty Position Openings, Division of Electrical Engineering, National Taiwan University |
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| 2006-12-26 | Workshop on Neuron-Electronics (IC與神經科學的對話) |
時間：14:00 ~ 17:00 地點：博理館 201 室 Invited Talk: "Neuroscience and its Applications" 嚴震東教授, 台大神經生物與認知科學研究中心主任 Invited Talk: "Brain Machine Interface: Opportunities, Challenges, and Enabling Technology" 劉文泰教授, 美國加州大學聖塔克魯斯大學(UC Santa Cruz) 電機工程系教授，同時也是美國國科會(NSF) 仿生微電子系統工程研究中心UC Santa Cruz分部主任 詳情請見內容海報。 |
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| 2006-12-21 | 廿世紀最受歡迎的表演藝術：音樂劇百年風華 - 電機系聯合導生活動 |
時間：12:20 ~ 13:20 地點：博理館201會議室 對象：歡迎電機系導師與學生參加 主講人：王世強(台北愛樂電台主持人) 名額有限，請於12月15日前預約 33663700轉172 洽向小姐 |
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| 2006-12-20 | 台大基因晶片線上分析系統(NTUMAPs)教育訓練 |
時間：9:30 大基因晶片線上分析系統(NTUMAPs)將於2006/12/20(三)上午9：30舉辦免費的教育訓練課程，歡迎您上網報名。 課程時間：2006年12月20日 (三) 上午9：30 課程地點：台大醫學院圓型電腦教室 (位置圖) 課程內容：由淺入深地講解NTUMAPs所提供的各種功能、使用方式及設定方法。 課程大綱：
課程聯絡人：許先生 / 郭小姐 聯絡電話：(02)23123456#8685 系統網址：http://ntumaps.cgm.ntu.edu.tw/ 報名網址：http://www.cgm.ntu.edu.tw/bbc/course/browse3.asp |
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| 2006-11-20 | 前瞻生醫科技論壇：2006電腦輔助診斷國際研討會 |
地點：博理館 101 國際演講廳 生醫電子與資訊學研究所將於民國95年11月20、21日假台灣大學博理館國際演講廳舉行「前瞻生醫科技論壇：2006電腦輔助診斷國際研討會」，邀請國內、外醫界及工程領域之傑出學者與業界人士參與，加強跨領域及跨國界之學術交流。 聯絡人: 黃期璟 聯絡電話: 02-3366-4961 傳真: 02-3366-3754 相關網址: http://www.bebi.ntu.edu.tw 詳情請見內容海報。 |
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| 2006-10-19 | 跨世代對談 - 台大電機系友成功經驗傳承 |
時間：14:00 ~ 16:30 地點：博理館 101 演講廳 詳細內容請見內容檔案。 |
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| 2006-10-11 | 95電機前瞻研究領域介紹 |
時間：2006-10-11 17:30 地點：電機二館R142會議室 你想了解控制、電力、CS 在學些什麼嗎?? 你想知道未來發展趨勢嗎?? 歡迎參加 備精緻餐點，數量有限，請提前入場。 |
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| 2006-09-25 | 96大專程度義務役預官士官招生 預官報名、合併入營暨國防役設明會 | 時間、地點、網址、聯絡方式，詳見內容檔案。 | |
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| 2006-07-10 ~ 2006-07-14 | Workshop by Prof. Jenshan Lin |
時間：請見海報 地點：請見海報 |
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| 2006-06-26 | 李琳南博士演講公告 |
時間：14:20 ~ 16:00 地點：博理館 R101 國際會議廳 詳情請見內容檔案 |
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| 2006-06-15 | 楊振邦博士演講公告 |
時間：10:30 ~ 12:00 地點：電機二館105視聽教室 楊振邦博士於台大電機系以優異成績畢業後，即赴美國麻省理工學院(MIT)深造，專攻電磁波與通訊。於1999年獲博士學位後，由於其個人一直以來對人類學與人文社會的興趣，乃一方面於MIT從事電機相關博士後研究，一方面研究科技社會與歷史，於2004年再獲科技史博士學位，並續於MIT擔任博士後研究員迄今。此次藉楊振邦博士於轉赴Institute for the History and Philosophy of Science and Technology, University of Toronto任教前的一小段空檔，乃擬與電機及科技史學者共同邀請楊振邦博士來台短期訪問，進行學術演講，與國內師生分享楊博士跨科技與人文的研究心得與經驗。 演講投影片請見附加檔案。 |
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| 2006-05-08 | 日本慶應義塾大學 安西祐一郎 校長 演講公告 |
時間：14:20 ~ 15:50 地點：博理館 R101 國際會議廳 演講者:安西 祐一郎校長(日本慶應義塾大學) 演講主題:The future of cutting edge research: academia, government and industry collaboration at Keio University. 演講內容:Next generation intermet protocol.Plastic optic fiber/photonics polimar proje.Ubiquitous computing communication project.Green chemistry 作者簡歷:1946年出生。1974年畢業于慶應義塾大學大學院工學研究科博士課程，並獲得工學博士學位。1971年任慶應義塾大學工學部助教。1981-1982 年任美國 Carnegie Mellon 大學客座副教授。1985 年任北海道大學文學部行動科學科副教授。1988 年任慶應義塾大學理工學部教授。1991 年任加拿大 McGill 大學客座教授。1993 年就任慶應義塾大學理工學部部長兼大學院理工學研究科委員長。在任8年期間，對該學部和研究科進行徹底改組，對招生考試、運行機制、人事制度等方面進行全方位的綜合性改革。自2001年起就任慶應義塾大學校長，以培養人材為本，為使在教育、科研、醫療、社會貢獻等方面都享譽國內外的慶應義塾大學能夠 “百尺竿頭，更進一步” 而竭盡所能地進行不懈的努力。 從事的研究專業領域為：情報(資訊)科學、認識科學、知識社會基礎工學。在通過資訊科學的方法論對人類的認識、思考、學習、記憶等資訊處理過程進行解析的認識科學、以及在對人類與環境、電子電腦和機器人之間的提問系統進行設計的研究領域都因其作為開闢者而廣為人知。 主辦單位:台大電機系 聯絡人:蘇美如小姐(電機二館114室) 電話:02-33663593 |
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| 2006-03-24 | 友達光電 演講公告 |
時間：13:20 ~ 14:10 地點：電機二館105視聽教室 講者: 友達光電 消費電子器產品研發處 協理 劉秉德 講題: AUO 與 平面線顯示器的未來 |
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| 2006-03-22 | 『我在台灣』走出南洋找夢想系列演講 |
時間：19:00 ~ 21:00 地點：電機二館105視聽教室 他們從馬來西亞出發，經由實際生活體驗、學習和成長， 在台灣行經大大小小的機會與挑戰。 他們離鄉背井，一路上腳踏實地，透過感知雙腳在路途上傳來的努力與能量， 走向自己的夢想。 歡迎您前來分享他們在台灣的故事，一同參與這場『找夢想』的真實紀錄。 主講人：潘健成 (群聯電子股份有限公司 總經理) 主辦單位：馬來西亞旅台同學會 協辦單位：台灣大學電機工程學系 |
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| 2006-03-20 | 揚智科技 台大校園招募說明會 |
時間：14:30 ~ 15:30 地點：電機二館105視聽教室 內容：揚智科技的研發高階主管、台大校友及HR人員將誠摯為您進行公司簡介及相關說明 現場備有精美贈品，及 MP3 player、咖啡杯等摸彩獎項 |
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| 2006-03-17 | Ssu-Pin (Simon) Ma 演講公告 |
時間：11:00 ~ 12:00 地點：電機二館 103 會議室 講題：Rising Stars in Wireless World , UWB Radios 大綱： The UWB (Ultra-Wide-Band) radio has several different wireless standards in thisfamily. Because of their unique physical behaviors, they have some specialadvantages over traditional radio systems. We will briefly go through an introductionof them. The MB-OFDM (Multi-Band Orthogonal Frequency Division Multiplexing) of UWB,also known as WiMedia, is one of the UWB radio standards. We will use a casestudy to describe its RF requirements and test results of a radio chip on a UWBtransceiver, based on the 0.18mm CMOS process. Its antenna diversity andselective receiver-combination collectively provide more interference immunity, andhence better throughput and adaptability. Other key features and broadband / high-speed performance will also be reviewed and discussed. 報名方式與講員簡介，請見附加檔案 |
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| 2005-12-13 | 95年 預官考前輔導 暨 國防工業訓儲預官甄選說明會 |
時間：18:00 地點：校總區行政大樓第1會議室 將邀請本校今年預官考試高分錄取同學提供考試準備經驗，訓儲人員分享參加甄選歷程，軍訓室解答同學相關兵役問題、說明考試及選填官科志願應注意事項，並於現場贈送考古題。 最新消息請至軍訓室網頁查詢 |
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| 2005-11-30 | 旺玖科技國防訓儲招募說明會 |
時間：12:20 ~ 13:10 地點：電機二館105視聽教室 對象：碩士以上電子、電機、電信、資工相關系所95年畢業，具備報考預官(士)資格者 主講人：張思恩 博士(旺玖產品研發處 副總經理) 詳見內容檔案 |
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| 2005-11-22 | 擎泰科技 2005年 國防訓儲招募說明會 |
時間：14:30 ~ 16:00 地點：電機二館 105 視聽教室 邀請對象：95年度應屆畢業生/符合95年度國防訓儲資格之同學 說明會內容 與 公司簡介，請見內容檔案。 |
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| 2005-11-04 | Prof. Irwin King 演講公告 |
時間：14:00 ~ 16:00 地點：博理館 212 室 講題：Local, Global, and Hybrid Learning 演講摘要 與 主講人簡歷，請見內容檔案。 |
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| 2005-10-31 | Prof. Richard R. Spencer (UC Davis) 演講公告 |
時間：15:30 ~ 16:30 地點：博理館 101 國際會議室 講題：Analog Circuits for Digital Communication 數位通訊之類比電路端 講者：Prof. Richard R. Spencer (UC Davis) 內容大綱 和 講者簡歷，請見內容檔案。 |
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| 2005-10-14 | 演講公告：IEEE COMSOC Distinguished Lecture Tour |
時間：14:00 ~ 15:30 地點：電機二館 105 視聽教室 Title: Wireless Technology & Service Evolution-Key Areas of Research & Innovations Speaker: Dr. Javan Erfanian, Bell Mobility, Canada- IEEE Expert Lecturer 演講摘要 & 講者簡歷請見內容檔案 |
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| 2005-09-26 | 張系國博士演講公告 |
時間：16:30 ~ 18:00 地點：博理館 101 演講廳 講題："A Chronobot for Time and Knowledge Exchange and Management" 演講摘要請見內容檔案。 講者小傳請見附加檔案。 演講內容節錄：... 往未來看﹐部落格可演變成為交換知識和時間的平臺。因為部落格有其主體性﹐顧客已經了解部落格主所要交換的時間和知識的價值﹐所以很容易達成協議。換言之﹐交換機制的重點不在競標和開標﹐也不在多議題協商﹐而在知識的主體性。順便一提﹐資策會和工研院共同支持﹐由我所主持的「天長地久計劃」的兩年計劃﹐正是為了發展這樣可以交換知識和時間的平台。這時間機器就叫做天長地久計。為這時間機器我特地創造了一個新的英文字﹕chronobot是chrono(時間)和robot(機器人)的結合... 還有其他更多精采內容，請蒞臨分享。 |
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| 2005-09-09 | 台積電蔡力行先生演講公告 |
時間：10:30 地點：博理館 101 室 講題：我在企業界怎麼看敦品力學 講者：蔡力行 博士 |
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| 2005-09-02 | Dr. Kamran Azadet 演講公告 |
時間：上午9：00∼11：00 地點：電機二館105視聽教室 講題：Bandwidth Efficient Modulation over Fiber 主講人：Dr. Kamran Azadet（Agere System） 內容大綱： We present the results of a research project at Bell Laboratories on bandwidth efficient modulation over fiber optics. In this presentation we use as a case study the example of a 40Gb/s electrical transmission scheme used in an optical system based on sub-carrier multiplexing (SCM). The proposed bandwidth efficient modulation reduces the signal bandwidth to 14GHz. This enables implementation in lower cost silicon technology and allows the use of optical components developed for 10Gbps digital transmission. The talk is composed of three parts, optical system, baseband digital signal processing, and analog/RF circuit implementation. In the first part of the talk, we present the overall system, in particular, the optical channel and components used and associated optical impairments. In the second part of the talk derive digital signal processing techniques and architectures that relax analog specifications and alleviate linear channel impairments. We finally review the implementation of a test-chip in standard 0.14mm CMOS process, validating the most challenging circuits. 主講人簡介： Kamran Azadet received the engineering degree from Ecole Centrale de Lyon in 1990, and the PhD degree from ENST Paris in 1994. From 1990 to 1994, he was a research engineer with Matra MHS in Saint Quentin en Yvelines, France, where he was involved in the design of video filters for acquisition systems. In 1994 he joined Bell Laboratories in Holmdel/NJ, where he worked in the area of color digital CMOS cameras, and high speed transceivers. He was a member of the IEEE 802.3ab Gigabit Ethernet 1000BASE-T standard, and the IEEE Ethernet high-speed study group 10 Gigabit Ethernet. Since 1999 he has lead research and development in the area of wireline communication – copper and optical – for Telecom and Datacom applications. He is currently director of PHY architecture at Agere Systems, Ethernet division. Dr. Azadet was a co-recepient of the 1998 IEEE Journal of Solid State best paper award for a paper on a color digital CMOS camera. He is serving in the committees of the IEEE Symposium on VLSI circuits and the VLSI-TSA conference in Taiwan, and has been an associate editor of the IEEE transactions on Circuits and Systems. He serves as a reviewer for journals such as TCAS, and JSSC. 活動網址：http://wrl.ee.ntu.edu.tw/workshop/ 免費參加!請先上網報名! 聯絡方式：國立台灣大學電子工程學研究所 聯絡人：李威明 電話：（02）2363-5251 ext.326 傳真：（02）2363-8247 （請註明聯絡人姓名） 電子信箱：workshop@wrl.ee.ntu.edu.tw 主辦單位：國立台灣大學-聯發科技無線研究實驗室 協辦單位：國立台灣大學電機工程學系/電子工程學研究所/電信工程學研究所、國立台灣大學系統晶片中心/ IEEE SSCS Taipei Chapter |
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| 2005-07-21 | 「研發商務合ｅ 卓越創新台灣」台灣大學暨IBM隨需服務聯合研究記者會 |
時間：7月21日 14:00 ~ 15:00 地點：博理館 201 室 IBM自2001年起，在全球推動校園聯合研究計畫（Shared University Research; SUR）。截至目前，IBM已提供超過1億美金的軟硬體、技術及獎金，與世界知名大學合作，共同進行各項領域的創新研發。舉凡哈佛、耶魯、麻省理工、卡內基、劍橋、牛津…等世界頂尖學府，均曾獲選參與IBM校園聯合研究計畫。 國立台灣大學為台灣高等教育的翹楚。今年從全球眾多申請單位中脫穎而出，成為台灣第一所榮獲IBM校園聯合研究計畫獎助的大學，與國際頂尖學府同步進行創新的學術研究。在合作計畫中，IBM將提供軟硬體、技術分享與美國華生研究中心之顧問諮詢，與台灣大學電機系及資管系合作，分別成立「隨需研發服務實驗室」及「隨需商務實驗室」，以「電子產業價值鏈的隨需服務」為題，進行前瞻性的整合研究。 有鑑於台灣在全球電子資訊產業的關鍵地位與未來競爭力的挑戰，此項「電子產業價值鏈的隨需服務」聯合研究計畫，將以半導體供應鏈管理與3C產品中小型企業的需求鏈管理為載具，研究整個價值鏈從晶片研發、設計、製造、以至於電子產品通路行銷，如何隨市場與客戶的需求，妥適運用分佈於全球的資源，提供快速、彈性、可靠而低成本的客製化服務。預期成果包括創新的服務模式、整合性解決方案的設計、及促成技術的開發與應用。 透過此項聯合研究計畫於電機系所成立的「隨需研發服務實驗室」及資管系的「隨需商務實驗室」，台灣大學將可進一步推動和國際標竿企業及世界一流大學的研究接軌，師生可更深入掌握未來產業的脈動與科技發展趨勢，培養具國際視野的科技與領導人才。 |
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| 2005-07-09 | 廣達電腦面談活動 |
時間：上午8:30開始 地點：廣達電腦華亞總廠 (桃園縣龜山鄉文化二路188號) 需求條件：大學以上電子、電機、資訊、資工相關系所畢 工作地點：林口華亞科技園區 產品類別：筆記型電腦、手機、伺服器、液晶電視 工作機會：硬體研發工程師、軟體研發工程師、機構設計工程師 詳見附加檔案 |
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| 2005-05-13 | 前瞻無線通訊技術專題演講 |
時間：10:00 ~ 12:00, 16:00 ~ 17:00 地點：電機二館105視聽教室 講員：Prof. Ye (Geoffrey) Li 講題1(上午)：Cognitive Radio with Cooperative Diversity 講題2(下午)：Limit-Approaching Signal Detection and Equalization based on Energy Spreading Transform 本講座為免費參加，請預先報名(一律採線上報名 )，以利課程資料準備。 報名網址： http://wrl.ee.ntu.edu.tw/workshop/ 聯絡方式、講員簡介，請見附加檔案。 |
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| 2005-05-02 | 吳作樂博士演講公告 |
時間：16:30 ~ 17:20 地點：博理館113教室 講者：國家太空計畫室 主任 吳作樂博士 講題：認識我國的太空計畫 演講摘要請見附加檔案。 |
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| 2005-04-26 | Nokia 諾基亞徵才說明會 |
時間：12:30 ~ 14:00 地點：電機二館 105 室 台灣諾基亞徵 技術支援工程師 / 網路規劃工程師 詳見附加檔案 |
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| 2005-04-13 | 打造無限夢想行動家 2005通訊大賽 百萬通訊達人系列講座 |
時間：12:30~13:30 地點：台大二活 Sunday's 餐廳 比賽說明會場次、時間表，請見內容檔 活動網址 - http://www.mobilehero.com |
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| 2005-03-17 ~ 2005-03-18 | Workshop on Wireless Sensor Networks |
地點：博理館101室 For more information, including the schedule, presentation titles and the introduction of the speakers, please see the attachment file. |
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| 2004/03/29 ~ 2004/04/30 | 2004 金羿獎 - 太陽光電應用設計競賽 | 工業技術研究院工業材料研究所為配合政府能源政策，帶動民眾對太陽光電的認知及達到能源觀念宣導及教育紮根， 以發展國內能源教育創意環境及創新太陽光電運用的新思維與新作法，特舉辦「2004 金羿獎 - 太陽光電應用設計競賽」 | |
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| 2004-11-22 | 台大系統晶片中心《國防役徵才集點活動。公開抽獎》 |
時間：12:30 地點：電機二館 142 會議室 |
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| 2004-11-06 | 國防訓儲 徵才面談會 |
地點：台大綜合體育館 為了協助國防役男解答疑問及慎選好工作，Career就業情報特地聯合眾多知名科技大廠，於 11/6 台大綜合體育館舉辦〔國防訓儲 徵才面談會〕 現場參展企業： 台積電、奇美電子、聯華電子、廣達電腦、中華映管、微星科技、光寶科技、統寶光電、正文科技、瀚宇彩晶、南亞科技、中強光電、盛群半導體、神腦國際、義隆電子、虹晶科技、德律科技、威盛電子、飛瑞、茂德科技、群聯電子、宏正科技、康舒科技、創惟科技、明泰科技、榮剛材料、喬鼎資訊、臺灣永光化學、禕峰科技、中鼎工程、環隆電氣、威達電、毅嘉科技 等半導體、資訊通訊、電機民生化工產業大廠，眾多知名企業聯合徵才 |
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| 2004-10-28 | 飆創意、征視界-工研院國防訓儲徵才說明會 |
時間：10:00~12:00 地點：本校工學院綜合大樓國際演講廳 10:00~10:10 台灣大學陳校長致詞 10:10~10:20 工研院李院長致詞 10:20~10:50 工研院概況介紹與徵才作業介紹 10:50~12:00 前瞻技術研發經驗分享 聯絡人：工研院人力室/ 鄭森皓 電話:03-5913204 工研院人力室/ 陳堯明 電話:03-5915726 傳真:03-5910015 |
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| 2004-10-25 | Gadi Singer (Intel CTO) 演講公告 |
時間：13:20~14:10 地點：博理館101演講廳 講者：Gadi Singer (Intel CTO) 講題：Communication Infrastructure from Vision to Reality 摘要：The telecommunications industry is once again in a state of flux. Still acclimating to the flood of competition unleashed by the 1996 Telecommunications Act in the United States, the industry now must comprehend how to best deliver a wider variety of services over a changing network infrastructure. Driving opportunities in today's telecommunications market is convergence. The Internet, wired and wireless, is becoming the primary, low-cost method of moving more then just data but also voice and ton of other services. The premise for this vision is clear; all high-speed wireless technologies (3G, UWB, Wi-Fi and WiMax) must coexist, working in tandem to meet provider and customer needs for truly mobile computing and communications across the globe. No single technology will become dominant or ubiquitous only flexible architectures coupled with modular systems are able to provide cost, quality of service and feature advantages to the IT, telecom and consumer industries. Each wireless technology must meet unique user requirements in a wirelessly connected world. In fact, the most robust wireless solutions will use a combination of technologies to enable increased mobility and eventually seamless roaming. |
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| 2004-10-20 | Prof. Behzad Razavi 演講公告 |
時間：14:00~15:00 地點：博理館101演講廳 台大-聯發科技無線研究實驗室將於10/20（三）邀請國際知名學者Prof. Behzad Razavi(UCLA)舉辦超寬頻CMOS講座 講題：An Ultra-Wideband CMOS Trasceiver 內容大綱： A direct-conversion UWB transceiver for Mode 1 OFDM applications employs three resonant networks and three PLLs. Designed in 0.13-um CMOS technology, the transceiver provides a total gain of 69-73 dB and a noise figure of 5.5-8.4 dB across three bands, and a TX 1-dB compression point of -10 dBm. The circuit consumes 105 mW from a 1.5-V supply. |
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| 2004-10-12 | 工研院晶片中心國防訓儲說明會 |
時間：13:40 地點：交通大學浩然國際會議廳B 報名截止日：93/10/06中午以前，以E-mail回傳報名表 報名窗口：張小姐，kk@itri.org.tw 聯絡電話：03-5915748 |
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| 2004-10-08 | 威盛電子 嵌入式平台講座 暨 EPIA創意設計大賽活動說明 |
時間：13:30~15:00 地點：電機二館105視聽教室 ．「嵌入式平台講座」 講座中將介紹嵌入式市場現況及未來發展策略、分享威盛於嵌入式市場的應用成果、嵌入式產品實體個案成品展示及Q & A討論時間；講座現場亦備有贈品、幸運抽獎及人才招募活動。 ．「EPIA創意設計大賽」 威盛電子將廣集所有大專院校個人及團體的創意，競賽內容將以EPIA主機板為要素材，經由書面初選、實作決選的評選方式，選出20名最富創意及實用性的數位家庭多媒體裝置設計產品，獲贈獎金及優選獎項。 (報名及更多的活動相關訊息，請至http://www.viaembedded.com.tw查詢) |
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| 2004-10-07, 2004-10-14 | 華碩電腦2004【尋找Mr. Right】國防訓儲校園徵才系列活動 |
地點：電機二館 105 視聽教室 活動一：名人演講會 演講主題：華碩練功坊—科技玩上癮 演講人：沈振來 副總經理 演講時間：93年10月7日(四) 晚上 6:00-8:30PM 活動二：國防訓儲徵才說明會 活動時間：93年10月14日(四) 中午 12:20-13:10 |
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| 2004-06-01 | 演算科技第一屆IC創意設計與應用大賽 說明會 |
時間：13:00~14:00 地點：電機二館104室 當網路流通的資訊，從單純的文字轉為影音或視訊多媒體，資訊量愈來愈大，處理器的速度遂變成瓶頸與挑戰。而解決的方式只有將資料加以壓縮或加大頻寬。近年來，Real Audio、WMA、AAC等音訊格式，藉由各種音訊壓縮的標準一一實現，同時，在多樣化網路多媒體服務市場逐漸成熟，DSP技術己成為消費性電子產品的心藏。 音訊壓縮的應用範圍非常寛廣，除了適用於網路、家電用品，還有全數位化廣播（DAB，Digital Audio Broadcasting）、DVB（Digital Video Broadcasting）、以及VCD/DVD Player、手機以及近來非常熱門的MP3隨身聴皆需要運用到音訊壓縮技術。而音訊壓縮技術能減少檔案的大小，又能同時保持音樂的品質，因此音訊壓縮成為數位音訊編碼的主軸。然而在sampling和quantization的數位化過程中，如何保有類比訊號數化的正確性及精確性，同時又能兼顧音效品質及檔案的容量，則是Audio Coding的核心技術。 想知道個人影音市場上最HOT的MP3隨身碟產品，是如何透過音訊編碼技術創造出輕薄、高容量及高音質的享受嗎？而音訊壓縮在多媒體可攜式產品上的應用又有那些？在未來你將面臨什麼樣的數位聲音革命？身為科技數位人的你絕不可錯過這次與數位音訊交鋒的機會。 競賽網頁： http://at-chip.com/goldendream.htm 聯絡人：李瑞純 Steffi Lee E-mail: steffilee@at-chip.com 演算科技 http://at-chip.com |
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| 2004-05-29 | 光寶科技、建興電子 聯合招募菁英甄選會 |
時間：9:00~17:00 地點：台北市內湖區瑞光路392號(光寶科技大樓) 需求條件：大學以上電子、電機、資工、電信、通訊、光電、機械、物理、化工等理工相關系所畢 職缺類別：技術研發、生產製造、行銷業務 工作地點：台北、林口、中和、新竹 報名專線：(02)2754-9933 報名網址：www.career.com.tw/liteon |
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| 2004-05-13 | Professor Oscar H. Ibarra 演講公告 |
時間：PM2:00 ~ 3:00 地點：電機二館105視聽教室 主講人: Professor Oscar H. Ibarra Department of Computer Science University of California at Santa Barbara 講題 : Automata-Theoretic Techniques for Analyzing Infinite-State Systems 摘要: Automata theory tries to answer questions concerning machine models and the languages they define, in particular, their closure and decidable properties. Classical questions like the relationships between finite/pushdown automata and regular/context-free languages are standard material in many undergraduate theory courses. New questions that arise from real-world applications, such as in verification, internet/web services, and molecular computing are providing interesting and challenging problems to automata theorists. In this talk, I will present some automata-theoretic and related techniques for analyzing infinite-state systems in the areas of formal verification, e-services, and membrane systems. |
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| 2004-04-15 | Dr. Sean McAlister 演講公告：Self Heating of SiGe-Base HBT |
時間：AM 10:20 地點：電機新館105室 講題：Self-Heating and the Temperature Distribution in Multi-emitter SiGe HBTs Speaker: Sean McAlister Institute for Microstructural Sciences, National Research Council of Canada, Ottawa High power bipolar transistors often have multiple emitters, to achieve high currents, and efficient use of the whole emitter area. The emitters experience high current densities and are self-heated above the ambient temperature, leading to concerns about thermal run-away and damage to the device. Are the emitters all at the same temperature during operation? To study this we have designed and used multi-emitter SiGe HBTs, with multiple emitter contacts, to examine the temperature distribution in the emitters in such devices.... Please read the content file for more information. |
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| 2004-04-12 | 施敏教授演講公告 |
時間：13:30-14:30 地點：電機二館143教室 演講者：交通大學 施敏 講座教授 講題：Encounter with the 20th Century Microelectronics |
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| 2004-03-11 | Aorkia Nathan教授演講公告 |
時間：下午2:00~3:00 地點：電機二館105室 講 員 : Prof. Aorkia Nathan, NSERC Fellow University of Waterloo, Canada 講題 : Highly Stable Amorphous Silicon Driver Circuits for Oled Displays |
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| HP 惠普公司實習機會 |
惠普公司提供 software engineering、product marketing、EE & ME 實習機會。 詳見附檔。 |
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