主要研究領域:
高速低功率類比及混合信號積體電路設計、類比和數位信號轉換器、鎖相迴路
Major Research Areas:
High-Speed/Low-Power Analog/Mixed-Signal Integrated Circuit Design, CMOS Data Converters and Phase-Locked Loop/Delay-Locked Loop
研究領域摘要:
類比和數位信號轉換器、鎖相迴路
Research Summary:
Hsin-Shu Chen’s research areas would include low-power, high-precision, high-speed Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs) for wire/wireless communications, low-jitter Phase-Locked Loop (PLL)/Delay-Locked Loop (DLL) clock generation in mixed-signal systems, and practical aspects of analog/mixed-signal Integrated Circuit (IC) design for System-On-Chip (SOC). The A/D Converter architectures will include pipeline, subranging, folding, interpolation, flash and sigma-delta for applications such as Digital Subscribe Line (xDSL), Software-Defined Radio (SDR), wireless LAN chipset (WLAN, IEEE 802.11), PC multimedia sound card chipset (AC97), cellular phone basestation system (GSM, GPRS, IMT-2000), and cordless phone handset system (CT2). The D/A Converters will focus on the current-steering segmented architecture. The research interest on the low-jitter PLL/DLL would emphasize on its usage to avoid the clock skew in a high-speed, high-precision sampled-data system such as an ADC system.