Publication List of 陳信樹 Hsin-Shu Chen

Journal articles & book chapters:

  1. Li-Yuan Yang, Hsin-Shu Chen, and Yi-Jan Emery Chen, “A 2.4 GHz Fully Integrated Cascode-Cascade CMOS Doherty Power Amplifier,” IEEE Microwave and Wireless Component letters, Mar. 2008
  2. Hsin-Shu Chen, Bang-Sup Song and Kantilal Bacrania, “A 14b 20MSamples/s CMOS Pipelined ADC,” EEE Journal of Solid-State Circuits, pp. 997-1001, Jun. 2001

Conference & proceeding papers:

  1. Yu-Hsiang Lin, Jonathan Chou, Yi-Chang Lu, Tzong-Lin Wu, and Hsin-Shu Chen, “Chip-Package-Board Co-design – a DDR3 System Design Example from Circuit Designers’ Perspective,” IEEE EDAPS, Seoul, Korea, Dec. 2008
  2. Hsin-Shu Chen and Chao-Ching Hung, “A Self-Calibrated Multiphase DLL-Based Clock Generator,” VLSI-DAT, Hsinchu, Taiwan, Apr. 2007
  3. Chien-Kai Hung, Jian-Feng Shiu, I-Ching Chen and Hsin-Shu Chen, “A 6-bit 1.6 GS/s Flash ADC in 0.18-μm CMOS with Reversed-Reference Dummy,” IEEE ASSCC, Hangzhou, China, Nov. 2006
  4. Sen-Wen Hsiao, Yen-Chih Huang, David Liang, Hung-Wei Kevin Chen and Hsin-Shu Chen, “A 1.5-V 10-ppm/ºC 2nd-Order Curvature-Compensated CMOS Bandgap Reference with Trimming,” IEEE ISCAS, Kos, Greece, May 2006
  5. Tang-Nian Luo, Shuen-Yin Bai, Yi-Jan Emery Chen, Hsin-Shu Chen and Deukhyoun Heo, “A 1-V CMOS VCO For 60-GHz Applications,” Asia-Pacific Microwave Conference, Suzhou, China, Dec. 2005
  6. Hsin-Shu Chen, Bang-Sup Song and Kantilal Bacrania, “A 14b 20MSamples/s CMOS Pipelined ADC,” IEEE International Solid-State Circuits Conf., Dig. Tech. Paper, San Francisco, CA, Feb. 2000
  7. Hsin-Shu Chen and Akira Ito, “Characterization of 1/f noise vs. number of gate stripes in MOS transistors,” Proc. IEEE ISCAS, pp. II310-II313, Orlando, FL, May 1999

Patents:

  1. Hsin-Shu Chen, et al., “System and Method of DC Calibration of Amplifiers,” US 6,714,886 B2, Mar. 2004
  2. J. Mikko Hakkarainen, Hsin-Shu Chen, et al., “Track and Hold with Dual Pump Circuit,” USA&US6,714,886 B2, Mar. 2004
  3. Hsin-Shu Chen, et al., “Calibration of Resistor Ladder Using Difference Measurement and Parallel Resistive Correction,” USA&US6,628,216 B2, Sept. 2003
  4. Hsin-Shu Chen, et al., “An Analog to Digital Converter Using Subranging and Interpolation,” U.S. Patent No.: US6,570,523 B1, May 2003