盧奕璋教授的個人資料 - Profile of Yi-Chang Lu

盧奕璋 Yi-Chang Lu

國立臺灣大學電機工程學系 教授
Professor, Department of Electrical Engineering, National Taiwan University

主要研究領域:

數位電路與系統; 信號處理與統計分析; 高效能計算與硬體加速器;

Major Research Areas:

Digital circuits and systems; Signal processing and statistical analysis; High performance computing and hardware accelerators;

研究領域摘要:

(1) 硬體加速:核糖核酸/去氧核糖核酸/蛋白質序列比對

(2) 硬體加速:帕松方程式/布萊克-休斯方程式/福克-普朗克方程式求解

(3) 計算式攝影:光場相機系統,高動態成像,亮度增強,去模糊與超解析成像

(4) 電腦輔助設計:連結/基板/微流道精簡模型,電子束佈局資料壓縮

 

Research Summary:

(1) Hardware Acceleration: RNA/DNA/protein sequence alignment

**Our FPGA-based platform for protein sequence alignment can reach a speed of 530 Giga Cell Updates Per Second. The design is the fastest single device solution for BLASTP.

(2) Hardware Acceleration: Poisson/Black-Shcoles/Fokker-Plank equation solvers

(3) Computational Photography: light field camera systems, high dynamic range imaging, low light enhancement, deblurring and superresolution

(4) Computer-Aided Design: compact modeling for interconnects/substrates/microfluidic channels, e-beam layout data compression

 

 

 

Photo of Yi-Chang Lu

代表性著作 Selected Publication

  1. Zhe-Wei Shen, Jheng-Syun Huang, Yi-Chang Lu, “A Memory-Efficient Accelerator for 128-Parallel Sequence-to-Graph Alignment in Variant-Enriched Regions,” 2024 IEEE Biomedical Circuits and Systems Conference (BioCAS), 1, Xi'an, China, Oct. 2024
  2. Hung-Yu Shu, Yi-Hsien Lin, Yi-Chang Lu, “Deep Plug-and-play Nighttime Non-blind Deblurring with Saturated Pixel Handling Schemes,” 2024 IEEE/CVF Winter Conference on Applications of Computer Vision (WACV), 1527, Waikoloa, HI, USA, Jan. 2024
  3. Yi-Hsien Lin, Yi-Chang Lu, “Low-Light Enhancement Using a Plug-and-Play Retinex Model With Shrinkage Mapping for Illumination Estimation,” IEEE Transactions on Image Processing, Vol. 31, 4897, Jul. 2022
  4. Yang-Ming Yeh, Yi-Chang Lu, “MSRCall: a Multi-scale Deep Neural Network to Basecall Oxford Nanopore Sequences,” Bioinformatics, Vol. 38, 3877, Jun. 2022
  5. Yu-Cheng Li, Yi-Chang Lu, “BLASTP-ACC: Parallel Architecture and Hardware Accelerator Design for BLAST-Based Protein Sequence Alignment,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 13, No. 6, 1771, Dec. 2019